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0x1E - PKTCFG1E [default 0x40]
Name
Bits
R/W
Description
Packet mode:
Pkt_mode
7
r/w
0 → Fixed length packet mode
1 → Variable length packet mode
Preamble Length:
00 → 1 byte
Preamb_len
6,5
r/w
01 → 2 bytes
10 → 3 bytes
11 → 4 bytes
DC-balanced scrambling enable:
Scrmb_En
4
r/w
0 → Scrambling OFF
1 → Scrambling ON
Cyclic Redundancy Check processing enable:
CRC_En
3
r/w
0 → CRC OFF
1 → CRC ON
Node address comparison for received packets:
00 → No comparison
ADDRS_cmp
2,1
r/w
01 → Compare with Node_Addrs only
10 → Compare with Node_Addrs and constant 0x00
11 → Compare with Node_Addrs and constants 0x00 or 0xFF
Calculate CRC and check result:
CRC_stat
0
r
0 → CRC failed
1 → CRC successful
This bit must be cleared by writing a 1 to its location.
Table 45
4.8 Page Configuration Register (PGCFG)
0x1F - PGCFG1F [default 0x00]
Name
Bits
R/W
Description
Automatically clear FIFO if CRC fails (receive only):
CRCclr_auto
7
r/w
0 → Clear FIFO if CRC fails
1 → Do not clear FIFO
Selects read or write FIFO while in standby mode:
RnW_FIFO
6
r/w
0 → Write FIFO
1 → Read FIFO
-
5,4,3,2
Not used
Register page select (leave set to Page 0 unless configuring low battery detect):
00 → Page 0
PAGE
1,0
r/w
01 → Page 1
10 → Not used
11 → Not used
Table 46
www.RFM.com E-mail: info@rfm.com
? 2009-2013 by RF Monolithics, Inc.
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Page 40 of 67
TRC105 - 05/29/13
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